An active matrix substrate for use in a liquid crystal display device or the like includes a switching element, such as a thin film transistor (hereinafter, “TFT”), in each pixel. Since the field effect mobility of crystalline silicon films is usually higher than the field effect mobility of amorphous silicon films, crystalline silicon TFTs can operate at a higher speed than amorphous silicon TFTs. Therefore, when a crystalline silicon film is used, not only a TFT which is provided in each pixel as the switching element, which is referred to as “pixel TFT”, but also a TFT which is a constituent of a peripheral circuit, such as a driver circuit or various functional circuits formed around the display region (in the frame region), which is referred to as “driver circuit TFT”, can be formed on the same substrate.
The pixel TFT is required to allow only a very small off-current leakage. If the off-current leakage is large, flicker, crosstalk, the like, occurs, and there is a probability that it deteriorates the display quality. In view of TFT which has a LDD structure (hereinafter, abbreviated as “LDD structure TFT”) is used as the pixel TFT.
The “LDD structure TFT” has a Lightly Doped Drain region (hereinafter, also abbreviated as “LDD region”) in at least either one of the space between the channel region and the source region of the TFT and the space between the channel region and the drain region of the TFT. In this structure, the LDD region, which has higher resistance than the source/drain region, is located between the edge of the gate electrode and low-resistance source/drain region, and therefore, the off-current leakage can be greatly reduced as compared with a TFT which does not have a LDD region (“single drain structure”).
Some active matrix substrates adopt LDD structure TFTs not only as the pixel TFTs but also as the driver circuit TFTs for the sake of simplfication of the manufacturing process. However, when LDD structure TFTs are used as the driver circuit TFTs, the following problems arise. Although the driver circuit TFTs are required to have a large current driving force, i.e., a large on-current, the LDD structure TFTs provide decreased current driving force as compared with single drain structure TFTs because the LDD region is a resistance in the LDD structure TFTs. Further, while the length of the LDD region in the channel length direction (LDD length) is optimized, there is a probability that designing the of circuits becomes complicated, or the size of the frame region increases. Further, the driver circuit TFTs, which operate at a high speed, are required to provide higher reliability.
In view of such, using TFTs in which the LDD region is overlapped by the gate electrode as the driver circuit TFTs has been proposed. Such a structure is referred to as “GOLD (Gate Overlapped LDD) structure”. In a TFT which has a GOLD structure (hereinafter, abbreviated as “GOLD structure TFT”), when a voltage is applied to the gate electrode, electrons which serve as carriers are accumulated in the LDD region overlapped by the gate electrode, and therefore, the resistance of the LDD region can be reduced. Thus, decrease of the current driving force of the TFT can be suppressed. Further, by forming an electric field relaxation region under the gate, the GOLD structure TFT can secure higher reliability than the LDD structure TFT.
Note that, in this specification, a structure in which the entirety of the LDD region is not overlapped by the gate electrode is referred to as “LDD structure”, and a structure in which at least part of the LDD region is overlapped by the gate electrode is referred to as “GOLD structure”.
However, when GOLD structure TFTs are formed as the driver circuit. TFTs on the same substrate in addition to the LDD structure TFTs, the number of photomasks used in the manufacturing process disadvantageously increases. The photomasks are used in photolithographic ally forming resist patterns which are to serve as masks in etching steps and ion implantation steps. Therefore, increasing the number of photomasks by one means that not only the etching and ion implantation steps but also the step of photolithographically forming a resist pattern, the step of peeling off the resist pattern, and the washing and drying steps are added. Therefore, as the number of photomasks increases, the manufacturing cost increases, the lead time increases, and the productivity greatly decreases. Also, there is a probability that the production yield decreases.
In view of such a problem, various processes designed for decreasing the number of photomasks as much as possible have been proposed.
For example, Patent Document 1 discloses using a halftone mask such that a GOLD structure TFT can be formed without increasing the number of photomasks. In Patent Document 1, a resist pattern which has partially varying thicknesses is formed in a photolithography step with the use of a halftone mask, and this is used as an etching mask in etching a semiconductor film. Then, recessed portions of the resist pattern are removed, and impurity doping is performed for formation of an LDD region. Therefore, etching of the semiconductor film and formation of the LDD region can be completed through a single photolithography step, and the number of photomasks can be decreased by one.